Effects of a lightly-doped-drain (LDD) implantation condition on the device characteristics of polycrystalline-Si thin-film transistors
نویسندگان
چکیده
Effects of a lightly-doped-drain (LDD) implantation condition on the device characteristics of poly-Si TFT have been studied. For a LDD implantation dose of 2–4 × 1013 cm−2, no significantly large difference in on-state current and off-state leakage is found. For a LDD implantation energy of 50–100 keV, however, the higher LDD implantation energy results in smaller off-state leakage and more reduction of the kink effect. These results are attributable to the more gradual and more widely distributed LDD dopant profile and thus the reduction of electric field near the drain region. As a result, a poly-Si TFT with better device performance and Ion/Ioff ratio can be implemented through the proper scheme of the LDD implantation condition.
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